System Integration Unit - Pins and routing. More...

Data Structures
union	IRQConfig_t
Defines
#define	TRUE (1u)
#define	CLEAR (0u)
#define	BIT_DEFINITION
#define	BIT0 (1u << 0u)
#define	BIT1 (1u << 1u)
#define	BIT2 (1u << 2u)
#define	BIT3 (1u << 3u)
#define	BIT4 (1u << 4u)
#define	BIT5 (1u << 5u)
#define	BIT6 (1u << 6u)
#define	BIT7 (1u << 7u)
#define	BIT8 (1u << 8u)
#define	BIT9 (1u << 9u)
#define	BIT10 (1u << 10)
#define	BIT11 (1u << 11)
#define	BIT12 (1u << 12)
#define	BIT13 (1u << 13)
#define	BIT14 (1u << 14)
#define	BIT15 (1u << 15)
#define	BIT16 (1u << 16)
#define	BIT17 (1u << 17)
#define	BIT18 (1u << 18)
#define	BIT19 (1u << 19)
#define	BIT20 (1u << 20)
#define	BIT21 (1u << 21)
#define	BIT22 (1u << 22)
#define	BIT23 (1u << 23)
#define	BIT24 (1u << 24)
#define	BIT25 (1u << 25)
#define	BIT26 (1u << 26)
#define	BIT27 (1u << 27)
#define	BIT28 (1u << 28)
#define	BIT29 (1u << 29)
#define	BIT30 (1u << 30)
#define	BIT31 (1u << 31)
#define	PIN_CONFIG_REGISTER_MAX (108u)
#define	N_PINS_PER_PORT (16u)
#define	N_INPUT_PADS (36u)
#define	PIN_SAFE_MODE_EN (0x4000u)
#define	PIN_SAFE_MODE_DIS (0x0000u)
#define	PIN_ANALOG_EN (0x2000u)
#define	PIN_ANALOG_DIS (0x0000u)
#define	PIN_PAD_GPIO (0x0000u)
#define	PIN_PAD_ALT1 (0x0400u)
#define	PIN_PAD_ALT2 (0x0800u)
#define	PIN_PAD_ALT3 (0x0C00u)
#define	PIN_OUTPUT_BUF_EN (0x0200u)
#define	PIN_OUTPUT_BUF_DIS (0x0000u)
#define	PIN_INPUT_BUF_EN (0x0100u)
#define	PIN_INPUT_BUF_DIS (0x0000u)
#define	PIN_OPEN_DRAIN_OUT (0x0020u)
#define	PIN_PUSH_PULL_OUT (0x0000u)
#define	PIN_FAST_SLEW_RATE (0x0004u)
#define	PIN_SLOW_SLEW_RATE (0x0000u)
#define	PIN_WEAK_PULL_ASSERT (0x0002u)
#define	PIN_WEAK_PULL_NEGATE (0x0000u)
#define	PIN_WEAK_PULL_DIS (0x0001u)
#define	PIN_WEAK_PULL_EN (0x0000u)
#define	PAD_SEL0 0u
#define	PAD_SEL1 1u
#define	PAD_SEL2 2u
#define	PAD_SEL3 3u
#define	PAD_SEL4 4u
#define	PAD_SEL5 5u
#define	PAD_SEL6 6u
#define	PAD_SEL7 7u
#define	PAD_SEL8 8u
#define	PAD_SEL9 9u
#define	PAD_SELA Au
#define	PAD_SELB Bu
#define	PAD_SELC Cu
#define	PAD_SELD Du
#define	PAD_SELE Eu
#define	PAD_SELF Fu
#define	PIN_DISABLED
#define	PIN_ANALOG_CONFIG
#define	PIN_PROGRAM (PIN_INPUT_BUF_EN \| PIN_WEAK_PULL_ASSERT)
#define	PIN_GPO_DEFAULT_CONFIG
#define	PIN_MISO_CONFIG
#define	PIN_GPI_DEFAULT_CONFIG
#define	PIN_GPIO_DEFAULT_CONFIG
#define	PIN_ALT1_CONFIG
#define	PIN_ALT2_CONFIG
#define	PIN_ALT3_CONFIG
#define	PAD_DOES_NOT_EXIST ((uint8_t)0x20u)
#define	SIU_INVALID_PIN_CONFIGURATION ((uint8_t)0x80u)
Enumerations
enum	PAD_INPUT_CHANNELS { PAD_EXT_IN = 0, PAD_DSPI2_SCK, PAD_DSPI2_SIN, PAD_DSPI2_CS0, PAD_DSPI3_SCK, PAD_DSPI3_SIN, PAD_DSPI3_CS0, PAD_ETIMER0_ETC4, PAD_ETIMER0_ETC5, PAD_ETIMER1_ETC0, PAD_ETIMER1_ETC1, PAD_ETIMER1_ETC2, PAD_ETIMER1_ETC3, PAD_ETIMER1_ETC4, PAD_ETIMER1_ETC5, PAD_PWM0_EXT_SYNC, PAD_PWM0_FAULT0, PAD_PWM0_FAULT1, PAD_PWM0_FAULT2, PAD_PWM0_FAULT3, PAD_PWM0_PWMA0, PAD_PWM0_PWMA1, PAD_PWM0_PWMA2, PAD_PWM0_PWMA3, PAD_PWM0_PWMB0, PAD_PWM0_PWMB1, PAD_PWM0_PWMB2, PAD_PWM0_PWMB3, PAD_PWM_PWMX1, PAD_PWM_PWMX2, PAD_PWM_PWMX3, PAD_LIN0_RXD, PAD_LIN1_RXD }
Functions
void	vfnConfigDefaultPinBehavior (const uint16_t *pu16Config, uint8_t u8Offset, uint8_t u8ConfigSize)
	Will configure a number of contiguous pins for a particular behavior - input, output, or routed to a specific module.
void	vfnToggleOutputPin (const uint8_t u8Port, const uint8_t u8Pin, const uint8_t u8Level)
	Will force an output pin to either a high or a low logical level.
uint8_t	u8fnReadPin (const uint8_t u8Port, const uint8_t u8Pin)
	Will return the current level for a given pin.
uint8_t	u8fnReturnPinIndex (const uint8_t u8Port, const uint8_t u8Pin)
	Will return the global index for a given port and pin number.
uint8_t	u8fnRouteInputPad (const uint8_t u8Module, const uint8_t u8PinIndex)
	Will route and input pad to the correct peripheral.
uint8_t	u8fnIRQConfig (uint8_t u8Channel, IRQConfig_t tConfig)
	Will configure an IRQ channel according to the passed argument.
void	vfnIRQClearIsrFlag (uint8_t u8Channel)
	Clears the appropriate Isr flag for a given channel.

Detailed Description

System Integration Unit - Pins and routing.

Author:: Freescale Semiconductor; SASD Automotive; R11515

Version:

Date:

Warning:: (If needed)

History:

Define Documentation

#define PAD_DOES_NOT_EXIST ((uint8_t)0x20u)

Error masks

#define PIN_ALT1_CONFIG

Value:

(PIN_SAFE_MODE_DIS | PIN_ANALOG_DIS | \
                         PIN_PAD_ALT1 | PIN_OUTPUT_BUF_DIS | \
                         PIN_INPUT_BUF_DIS | PIN_PUSH_PULL_OUT | \
                         PIN_SLOW_SLEW_RATE | PIN_WEAK_PULL_NEGATE | \
                         PIN_WEAK_PULL_EN)

Routed to alternate configuration #1

#define PIN_ALT2_CONFIG

Value:

(PIN_SAFE_MODE_DIS | PIN_ANALOG_DIS | \
                         PIN_PAD_ALT2 | PIN_OUTPUT_BUF_DIS | \
                         PIN_INPUT_BUF_DIS | PIN_PUSH_PULL_OUT | \
                         PIN_SLOW_SLEW_RATE | PIN_WEAK_PULL_NEGATE | \
                         PIN_WEAK_PULL_EN)

Routed to alternate configuration #2

#define PIN_ALT3_CONFIG

Value:

(PIN_SAFE_MODE_DIS | PIN_ANALOG_DIS | \
                         PIN_PAD_ALT3 | PIN_OUTPUT_BUF_DIS | \
                         PIN_INPUT_BUF_DIS | PIN_PUSH_PULL_OUT | \
                         PIN_SLOW_SLEW_RATE | PIN_WEAK_PULL_NEGATE | \
                         PIN_WEAK_PULL_EN)

Routed to alternate configuration #3

#define PIN_ANALOG_CONFIG

Value:

(PIN_SAFE_MODE_DIS | PIN_ANALOG_EN | \
                                PIN_PAD_GPIO | PIN_OUTPUT_BUF_DIS | \
                                PIN_INPUT_BUF_DIS | PIN_PUSH_PULL_OUT | \
                                PIN_SLOW_SLEW_RATE | PIN_WEAK_PULL_ASSERT | \
                                PIN_WEAK_PULL_DIS)

Analog config routes buffer without an output buffer

#define PIN_CONFIG_REGISTER_MAX (108u)

For safety reasons

#define PIN_DISABLED

Value:

(PIN_SAFE_MODE_DIS | PIN_ANALOG_DIS | \
                                PIN_PAD_GPIO | PIN_OUTPUT_BUF_DIS | \
                                PIN_INPUT_BUF_DIS | PIN_PUSH_PULL_OUT | \
                                PIN_SLOW_SLEW_RATE | PIN_WEAK_PULL_NEGATE | \
                                PIN_WEAK_PULL_EN)

Disabled pins have both buffers disabled

#define PIN_GPI_DEFAULT_CONFIG

Value:

(PIN_SAFE_MODE_DIS | PIN_ANALOG_DIS | \
                                PIN_PAD_GPIO | PIN_OUTPUT_BUF_DIS | \
                                PIN_INPUT_BUF_EN | PIN_PUSH_PULL_OUT | \
                                PIN_SLOW_SLEW_RATE | PIN_WEAK_PULL_ASSERT | \
                                PIN_WEAK_PULL_DIS)

Only the input buffer is set

#define PIN_GPIO_DEFAULT_CONFIG

Value:

(PIN_SAFE_MODE_DIS | PIN_ANALOG_DIS | \
                                 PIN_PAD_GPIO | PIN_OUTPUT_BUF_EN | \
                                 PIN_INPUT_BUF_EN | PIN_PUSH_PULL_OUT | \
                                 PIN_SLOW_SLEW_RATE | PIN_WEAK_PULL_ASSERT | \
                                 PIN_WEAK_PULL_DIS)

Both input & output buffers are set

#define PIN_GPO_DEFAULT_CONFIG

Value:

(PIN_SAFE_MODE_DIS | PIN_ANALOG_DIS | \
                                PIN_PAD_GPIO | PIN_OUTPUT_BUF_EN | \
                                PIN_INPUT_BUF_DIS | PIN_PUSH_PULL_OUT | \
                                PIN_SLOW_SLEW_RATE | PIN_WEAK_PULL_ASSERT | \
                                PIN_WEAK_PULL_DIS)

Only the output buffer is set

#define PIN_MISO_CONFIG

Value:

(PIN_SAFE_MODE_DIS | PIN_ANALOG_DIS | \
                                PIN_PAD_GPIO | PIN_OUTPUT_BUF_EN | \
                                PIN_INPUT_BUF_EN | PIN_OPEN_DRAIN_OUT | \
                                PIN_FAST_SLEW_RATE | PIN_WEAK_PULL_NEGATE | \
                                PIN_WEAK_PULL_DIS)

#define PIN_SAFE_MODE_EN (0x4000u)

Pin masks

#define TRUE (1u)

Default Yes and No defines

Enumeration Type Documentation

enum PAD_INPUT_CHANNELS

Input Pad channels

Function Documentation

uint8_t u8fnIRQConfig	(	uint8_t	u8Channel,
		IRQConfig_t	tConfig
	)

Will configure an IRQ channel according to the passed argument.

Parameters:

u8Channel,:	IRQ channel (from 0 to 31) to be configured.
tConfig,:	Configuration for the IRQ channel according to IRQConfig_t. Passed values include Rising and/or falling edge detection, glitch filter enabling, and interrupt enable bit.

Returns:: Always clear.

uint8_t u8fnReadPin	(	const uint8_t	u8Port,
		const uint8_t	u8Pin
	)

Will return the current level for a given pin.

Parameters:

u8Port	Port to which the pin belongs. Passed argument should be ASCII representation of port. I.E. for port A, the passed argument should be 'A' or 0x41.
u8Pin	Pin number in the port. This value should NOT be ASCII.

Returns:: 0 or 1, depending on the logical level at the pin; SIU_INVALID_PIN_CONFIGURATION in case the pin is not configured neither as input nor output.

Note:: Pin must be configured as input for this result to be valid

uint8_t u8fnReturnPinIndex	(	const uint8_t	u8Port,
		const uint8_t	u8Pin
	)

Will return the global index for a given port and pin number.

Parameters:

u8Port	Port to which the pin belongs. Passed argument should be ASCII representation of port. I.E. for port A, the passed argument should be 'A' or 0x41.
u8Pin	Pin number in the port. This value should NOT be ASCII.

Returns:: Global pin index, as used by GDPO, GDPI, PCR, and other registers

uint8_t u8fnRouteInputPad	(	const uint8_t	u8Module,
		const uint8_t	u8PinIndex
	)

Will route and input pad to the correct peripheral.

Parameters:

u8Module	Input pad number as listed in PAD_INPUT_CHANNELS enum.
u8PinIndex	Index number for the appropriate pins, as listed by PAD_SELx defines and as specified in the device's reference manual.

Returns:: PAD_DOES_NOT_EXIST in case the pad is not found; CLEAR otherwise.

void vfnConfigDefaultPinBehavior	(	const uint16_t *	pu16Config,
		uint8_t	u8Offset,
		uint8_t	u8ConfigSize
	)

Will configure a number of contiguous pins for a particular behavior - input, output, or routed to a specific module.

Parameters:

pu16Config	Pointer to configuration value. This register will be placed in the adequate PCR register.
u8Offset	Starting pin number.
u8ConfigSize	Number of contiguous pins to config.

Returns:: void.

void vfnIRQClearIsrFlag ( uint8_t u8Channel )

Clears the appropriate Isr flag for a given channel.

Parameters:

u8Channel,: IRQ channel (from 0 to 31).

Returns:: Void.

void vfnToggleOutputPin	(	const uint8_t	u8Port,
		const uint8_t	u8Pin,
		const uint8_t	u8Level
	)

Will force an output pin to either a high or a low logical level.

Parameters:

u8Port	Port to which the pin belongs. Passed argument should be ASCII representation of port. I.E. for port A, the passed argument should be 'A' or 0x41.
u8Pin	Pin number in the port. This value should NOT be ASCII.
u8Level	CLEAR for 0, any other value for 1.

Returns:: void.

Note:: The corresponding pin must be configured as output for the result to be effective

Data Structures

Defines

Enumerations

Functions

Detailed Description

Define Documentation

Enumeration Type Documentation

Function Documentation